Keynote Title: “Emerging Computing Trends in the Datacenter”
For decades we have been able to take advantage of Moore’s Law to improve single thread performance, reduce power and cost with each generation of semiconductor technology. While technology has advanced after the end of Dennard scaling more than 10 years ago, the advances have slowed down. Server performance increases have relied on increasing core counts and power budgets.
At the same time, workloads have changed in the era of cloud computing. Scale out is becoming more important than scale up. Domain specific architectures have started to emerge to improve the energy efficiency of emerging workloads like deep learning
This talk will provide a historical perspective and discuss emerging trends driving the development of modern servers processors.
Company: Qualcomm Datacenter Technologies, Inc,
Dr. Dileep Bhandarkar is Vice President, Technology of Qualcomm Datacenter Technologies, Inc, working on technology development for next generation server platforms. He has extensive industry experience in processor design, platform architecture, competitive analysis, strategic planning and semiconductor technology. He is an IEEE Life Fellow.
He was previously Distinguished Engineer at Microsoft responsible for Cloud Server Hardware and datacenter Infrastructure for Global Foundation Services (GFS). He led the development of cloud optimized servers to replace industry standard servers resulting in lower TCO (power & purchase price). He also developed specifications for water-cooled containers and worked with 3 different OEMs to deploy modular solutions, followed by the specification of next generation free air cooled modular datacenters. He has presented Datacenter Efficiency and Server Design Strategy at several industry forums. He left Microsoft as Chief Architect for GFS, focused on driving new technology initiatives that advance the energy efficiency of Microsoft’s cloud infrastructure.
Prior to joining Microsoft, Dr. Bhandarkar was director of advanced architecture in the CTO Office of Intel’s Digital Enterprise Group and a lead spokesperson for evangelizing Intel server platform technologies to the industry and financial analysts. He was an Intel Distinguished Lecturer for several years. At Intel, he established architecture direction for new workstation business. He championed the establishment of a power optimized microprocessor design for mobile computing as part of Intel’s Centrino Mobile Technology. He was also instrumental in driving the strategic decision to implement AMD compatible 64-bit x86 architecture and pioneered the adoption of energy-efficient microprocessor cores across Intel’s product line. He led the definition of server microprocessor products based on multiple low power mobile cores.
Dr. Bhandarkar spent almost 18 years at Digital Equipment Corporation, where he managed processor and system architecture, and performance analysis work related to the VAX, Prism, MIPS, and Alpha architectures. He also worked at Texas Instruments for four years in their research labs in a variety of areas including magnetic bubble memories, charge coupled devices, fault tolerant memories, and computer architecture.
Dr. Bhandarkar holds 16 U.S. patents and has published more than 30 technical papers in various journals and conference proceedings. He is also the author of a book titled “Alpha Implementations and Architecture.” In 1997, he was elected an IEEE Fellow for contributions and technical leadership in the design of complex and reduced instruction set architecture and in computer system performance analysis. In 1998, he was recognized as a distinguished alumnus of the Indian Institute of Technology, Bombay, where he received his B. Tech in electrical engineering in 1970. He also has a M.S. and Ph.D. in electrical engineering from Carnegie Mellon University, and has done graduate work in business administration at the University of Dallas.