The RT patchset has come to EoL and an alternative to meet the determinism and latency requirements for networking workloads is required. Compare the two solutions and the impacts migrating to Core isolation may impose.
Opening Keynote – George Grey, Linaro CEO
Speaker: George Grey
Date: February 9, 2015
★ Session Summary ★
Keynote Topic: Welcome to Linaro Connect and an update on the latest Linaro developments
★ Resources ★
★ Event Details ★
Linaro Connect Hong Kong 2015 – #HKG15
February 9-13th, 2015
Regal Airport Hotel Hong Kong Airport
The beloved LAVA dispatcher is currently undergoing a transformation to become a lean, mean, use case supporting machine. Whilst the development is not yet complete the LAVA team would like to provide status on what has been completed, what is in progress, and what is next. Feel free to join the team for a discussion shortly after a brief presentation and help us define the future of the LAVA dispatcher!
What software is required to make a standard hardware development platform a success? This session will invite input from a panel of representatives of multiple distributions, the toolchain and broader community.
The 32-bit ARM kernel supports a wide variety of processors harking back to ARM v4 architecture up to the latest v7 SMP processors. This huge legacy forced kernel developers to adapt the power management code for the newest processors (eg v7 multi-cluster systems) to an infrastructure that was developed to support simpler uniprocessor (UP) ARM architectures, resulting in code fragmentation and lack of unified drivers.
The brand new ARM v8 architecture provides kernel developers a clean slate to start developing new code, a nice opportunity to learn lessons from the past and bring about a kernel power management (PM) subsystem completely generic and up to the latest standards. This talk will provide details of the undergoing effort carried out at ARM to develop a kernel PM framework for ARM v8 systems, with kernel design details of the respective DT and ACPI implementations.
CMEM is an API and kernel driver for managing one or more blocks of physically contiguous memory. It also provides address translation services (e.g. virtual to physical translation) and user-mode cache management APIs.
See : http://processors.wiki.ti.com/index.php/CMEM_Overview
CMEM allows TI to share buffers between user space (ARM) and the DSP (or other remote processors). For Keystone, we also need the ability to allocate large (> 2GB) buffers from CMA.
In addition to managing shared data buffers for media applications, CMEM is used by the networking stack to get physical addresses to program hardware registers (new UIO capability needed?)
This session plans to be a presentation of TI SoC requirements which are currently being met by CMEM, and a discussion of how/if we can meet these requirements instead using UMM (cenalloc/dma-buf), DRM, CMA or other mainline Linux mechanisms existing or under development.
Memory footprint analysis
Android toolchain updates: Building Android with clang 3.6 (prerelease), Linaro gcc 4.9, gcc 5.0 (prerelease) and binutils 2.25
-O2 vs. -O3 vs. -Ofast vs. -Os
Android Upstreaming - updates, and next steps
cenalloc - status and next steps
libjpeg-turbo status and performance results
Validation of VP8/VP9 using LAVA