Linaro has been refining the secure storage solution in OP-TEE and in this session the audience will get an update about the current status and also will get to know about the implementation details, design decisions and what algorithms that has been used.
Android doesn’t give application access to hardware over bus interfacing APIs like I2C, SPI, GPIO, UART, etc. This is going to change in future as Android apps needs to work with multiple different devices like sensors, controllers, etc directly to meet the efficiency and speed required. In this presentation we will introduce the APIs, architecture design and a working demo.
VLAND is a project to enable dynamic network configuration of various switches. A communication protocol to interact with the daemon will be integrated into Linaro’s Automated Validation Architecture so that jobs can dynamically configure the network for testing. In this session, we will review the current state of the project, next steps, and open it up for a discussion.
VIXL is dynamic code generation toolkit for ARMv8 that we hope will enable JIT creators to rapidly target the ARM instruction set.
some of the pitfalls and time-sinks involved in creating a good JIT compiler backend. This led us to develop some tools to help improve our productivity. With ARM announcing the new Cortex-A range of processors supporting the AArch64 execution state we decided that we would focus our efforts on A64 tooling to enable developers to rapidly port programming language virtual machines for this new processor range. Soon after we decided to support Aarch32 as well.
This presentation will introduce you to what VIXL is, what’s new in VIXL and how to use it and take advantage of all its components that cover all the aspects of software development on ARM CPUs.
This is an inside look of the state of compliance from the perspective of the Software Freedom Conservancy, a nonprofit charitable organization that is the most active in the field. Karen will give an overview of where things are with compliance initiatives and insight into the ideological movement behind copyleft.
Automatically reducing the Linux kernel size may be achieved in
different ways. Using LTO (Link Time Optimization) is one such way with many advantages, but it also has major issues. A simpler alternative is linker section garbage collection. However, it turns out that even “simpler” solutions have their share of unsuspected pitfalls, especially on ARM. Those pitfalls and proposed solutions are the subjects of this discussion.
The openCSD project is developing an open source trace decode library for ARM CoreSight trace sources. When complete, this will provide trace decode for current ARM Cortex cores and associated trace protocols.We will provide a short presentation describing the library architecture and scope, along with use cases and outline examples. The current status of the project and future plans will also be provided.
This will be followed a discussion / Q & A session.
Both the Field and more recently the LAVA lab have worked on HOWTOs to fill a need for a getting-up-and-running thread of documentation alongside the more mature reference information. Using material from both of these the session proposes to show how an evaluation installation of LAVA along with a qemu target can be assembled in a VM. The target audience is member engineers or managers who are aware of LAVA and would consider to evaluate a pilot local installation
Due to team size and dynamics, the LAVA dispatcher refactoring has been a slow and gradual push to replace the original device communication logic and we are starting to get closer to completion. Join us for a update and discussion on the current state of the effort, see how current use cases will migrate and how new use cases can be adopted.