In this session we will present the DDS Security library project: an open source library that isolates the DDS security operations and key management under a Trusted Execution Environment (TEE). This approach uses Arm security hardware (TrustZone™) to secure communication between discrete components within the fabric of autonomous machines - Automotive, Robotics, Drones etc. whilst keeping secure assets (e.g. keys) protected. The presentation will focus on the OP-TEE backend, its operation and enablement into eProsima’s Fast-RTPS DDS library implementation to provide a readily available secure stack on an Arm based systems on projects like the Robotic Operating System (ROS).
YVR18-306:libddssec: Securing DDS with OP-TEE
Supporting Complex MIPI DSI Bridges in a Linux systemFriday, September 24, 2021
Display interface solutions are often critical to design due a mismatch between System On Chips(SoC) and it’s associated application-specific display devices. A display interface bridge prevents this mismatch by converting...
HKG18-HK16 - PMWG Hacking: Big/Little Capacity AwarenessWednesday, April 11, 2018
Session ID: HKG18-HK16 Session Name: HKG18-HK16 - PMWG Hacking: Big/Little Capacity Awareness Speaker: Vincent Guittot Track: Power Management ## Session Summary ## big/LITTLE capacity awareness ## Resources Event Page: http://connect.linaro.org/resource/hkg18/hkg18-hk16/...
SAN19-106 - What’s new in VIXL 2019?Friday, October 4, 2019
VIXL is a ARMv8 Runtime Code Generation Library which contains three components:
- Programmatic assemblers to generate A64, A32 or T32 code at runtime.
- Disassemblers that can print any instruction emitted by the assemblers.
- Simulator can simulate any instruction emitted by the A64 assembler on x86 and ARM platform. It is configurable, vector length for SVE, for example, and it supports register tracing during the execution.
In this talk, were going to introduce:
- What is VIXL? It is already deployed and is considered “mature”, for example, it has been adopted by Android ART compiler for its ARM backends: AArch64 and AArch32.
- CPU feature management and detection.
- New Armv8.x instructions support, e.g. BTI, PAuth, etc.
- New SVE (Scalable Vector Extension) support.
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